Analog Electronics / Chapter 5

Field Effect Transistors (FET): Topics, Subtopics, Study Flow, and Working Steps

Chapter-by-chapter GATE/PSU explanation with every topic and subtopic organized for concept building, revision, interviews, and numerical solving.

Chapter 5 / Professional FET Builder

Field Effect Transistors (FET)

This chapter explains FETs as electric-field controlled channel devices. Unlike BJTs, the controlling terminal ideally draws almost no current, so the main design question becomes: how does gate voltage shape the channel?

GATE/PSU Lens

Track VGS, threshold or pinch-off condition, drain-current region, bias stability, and amplifier configuration.

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FET gate-field visualization

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Working Steps: Gate Field to Drain Current

01

The gate voltage controls the channel without significant gate current.

02

In JFETs, reverse gate bias narrows the channel and controls drain current.

03

In enhancement MOSFETs, gate voltage above threshold creates the conducting channel.

04

Select cutoff, triode, or saturation equations from the operating condition.

05

Use the small-signal transconductance to calculate amplifier gain.

Introduction

A Field Effect Transistor, or FET, is a semiconductor device in which an electric field controls current through a conducting channel. Unlike a BJT, which needs base current for control, a FET is mainly controlled by voltage applied at the gate terminal.

FETs are important because modern electronics needs devices that consume very little input current, switch fast, occupy small chip area, and can be packed in huge numbers inside integrated circuits.

Why This Topic Matters

  • Industry relevance: MOSFETs are the backbone of CMOS ICs, microprocessors, memory, power electronics, SMPS, motor drives, RF circuits, and analog switches.
  • Analog relevance: FETs are used in common-source amplifiers, source followers, current sources, active loads, differential pairs, and high-input-impedance sensor circuits.
  • Exam relevance: GATE and university exams test JFET pinch-off, MOSFET threshold voltage, operating regions, drain-current equations, transconductance, and FET amplifier gain.
  • Interview relevance: strong answers explain channel formation and gate-field control instead of only quoting drain-current formulas.

Prerequisites

  • PN junction and depletion region
  • Doping and majority carriers
  • Electric field effect on charge carriers
  • Voltage, current, and resistance concepts
  • Basic amplifier gain and biasing
  • Small-signal model and transconductance idea

Basic Intuition

Imagine a water pipe with a flexible wall. The water flow is drain current. The pipe opening is the channel. The gate voltage presses on the channel electrically and changes how wide the path is. A wider channel allows more current; a narrower channel allows less current.

In a JFET, the channel already exists and gate reverse bias squeezes it. In an enhancement MOSFET, the channel does not exist at zero gate voltage; it forms only when gate voltage crosses threshold.

Simple memory: BJT uses input current for control; FET uses gate voltage and electric field for control.

Core Theory Explanation

A FET has three main terminals: gate, drain, and source. Current flows mainly between drain and source through a channel. The gate controls that channel through an electric field.

  • JFET: gate-channel junction is reverse biased; increasing reverse bias narrows the channel.
  • Depletion MOSFET: channel exists initially and can be depleted or enhanced by gate voltage.
  • Enhancement MOSFET: channel is induced only when gate-source voltage exceeds threshold voltage.
  • FET amplifier action: a small change in gate voltage causes a larger change in drain current, which creates output voltage across a load.

The key physical concept is channel control. The gate does not need to inject significant DC current. It creates an electric field, and that field controls the carrier density or channel width between drain and source.

Step-by-Step Mathematical Derivation

1. JFET Drain Current

For a JFET, the channel is widest when gate-source voltage is zero. As reverse gate voltage increases, the depletion region expands and the channel becomes narrower. Shockley's equation models this behavior:

$$ I_D = I_{DSS}\left(1-\frac{V_{GS}}{V_P}\right)^2 $$

  • $$ I_D $$ is drain current.
  • $$ I_{DSS} $$ is maximum drain current when gate-source voltage is zero.
  • $$ V_{GS} $$ is gate-source voltage.
  • $$ V_P $$ is pinch-off voltage, the gate voltage that almost closes the channel.

Physical meaning: the squared term tells us that channel current does not reduce linearly. As the channel is squeezed, current falls faster.

2. MOSFET Threshold Condition

In an enhancement MOSFET, drain current does not start properly until a conducting channel is formed. This happens when gate-source voltage crosses threshold voltage.

Channel forms when $$ V_{GS} > V_T $$

Below threshold, the gate field is not strong enough to create a useful inversion channel. Above threshold, carriers gather under the gate oxide and create a controllable path from drain to source.

3. MOSFET Drain Current in Saturation

In saturation region, a long-channel enhancement MOSFET behaves approximately as a voltage-controlled current source:

$$ I_D = \frac{1}{2}k(V_{GS}-V_T)^2 $$

  • $$ k $$ depends on device geometry, mobility, oxide capacitance, and channel dimensions.
  • $$ V_{GS}-V_T $$ is called overdrive voltage.
  • The larger the overdrive voltage, the stronger the channel and the larger the drain current.

4. Transconductance

Transconductance measures how effectively gate voltage controls drain current. It is the small-signal slope of the drain-current curve.

$$ g_m = \frac{\Delta I_D}{\Delta V_{GS}} $$

Plain meaning: if a tiny change in gate voltage produces a large change in drain current, the device has high transconductance and can provide strong amplification.

5. Common-Source Voltage Gain

In a common-source amplifier, gate voltage changes drain current. Drain current variation creates voltage variation across the drain resistor.

$$ A_v \approx -g_m R_D $$

The negative sign means phase inversion. When gate voltage increases, drain current increases, voltage drop across the drain resistor increases, and drain voltage falls.

Working Principle

  1. Apply gate-source voltage to create or control the channel.
  2. Drain-source voltage pulls carriers through the channel.
  3. Gate electric field changes channel width or channel charge density.
  4. Drain current changes according to gate-source voltage.
  5. In amplifier use, drain-current change is converted into output voltage across a load.
  6. In switching use, the FET moves between cutoff and low-resistance ON state.

Diagram Explanation

FET Structure and Channel Control Diagram Here
Drain Characteristics Graph Here

The structure diagram should show gate, drain, source, oxide or PN junction, and channel. The characteristics graph should show how drain current changes with drain-source voltage for different gate-source voltages.

Important Formulas

JFET drain current

$$ I_D=I_{DSS}\left(1-\frac{V_{GS}}{V_P}\right)^2 $$

Gate reverse bias squeezes the channel and reduces current.

MOSFET threshold condition

$$ V_{GS}>V_T $$

Enhancement MOSFET channel forms only above threshold.

MOSFET saturation current

$$ I_D=\frac{1}{2}k(V_{GS}-V_T)^2 $$

Drain current rises with square of overdrive voltage.

Overdrive voltage

$$ V_{OV}=V_{GS}-V_T $$

Extra gate voltage available after channel formation.

Transconductance

$$ g_m=\Delta I_D/\Delta V_{GS} $$

Measures gate-voltage control over drain current.

Common-source gain

$$ A_v\approx -g_mR_D $$

Current variation through drain resistor creates inverted voltage gain.

Triode-region condition

$$ V_{DS}<V_{GS}-V_T $$

MOSFET behaves like a voltage-controlled resistor.

Saturation-region condition

$$ V_{DS}\ge V_{GS}-V_T $$

MOSFET behaves approximately like a controlled current source.

Real-World Applications

  • CMOS logic gates and microprocessors
  • Memory cells and digital ICs
  • SMPS and DC-DC converters
  • Motor drivers and power inverters
  • Low-noise sensor input stages
  • Analog switches and multiplexers
  • RF amplifiers and mixers
  • Source followers and impedance buffers

Solved Examples

Beginner Example

An enhancement MOSFET has $$ V_T=2\,V $$. If $$ V_{GS}=1.5\,V $$, is a strong channel formed?

Since gate-source voltage is less than threshold voltage, a strong inversion channel is not formed. The MOSFET remains OFF for basic circuit analysis.

Intermediate Numerical

A MOSFET has $$ k=2\,mA/V^2 $$, $$ V_T=1\,V $$, and $$ V_{GS}=3\,V $$. Find saturation drain current.

Overdrive voltage: $$ V_{OV}=V_{GS}-V_T=3-1=2\,V $$

$$ I_D=\frac{1}{2}kV_{OV}^2=\frac{1}{2}(2)(2)^2=4\,mA $$

Advanced Problem

A common-source amplifier has $$ g_m=4\,mS $$ and $$ R_D=5\,k\Omega $$. Estimate voltage gain.

$$ A_v\approx -g_mR_D=-(4\times10^{-3})(5\times10^3)=-20 $$

The magnitude of gain is 20, and the negative sign means the output is 180 degrees out of phase with the input.

Common Mistakes

  • Thinking MOSFET gate draws large DC current. Ideally, the insulated gate draws almost no DC current.
  • Confusing JFET pinch-off voltage with MOSFET threshold voltage.
  • Using saturation current equation when the MOSFET is actually in triode region.
  • Forgetting that enhancement MOSFET needs gate voltage above threshold to form a strong channel.
  • Ignoring the negative sign in common-source voltage gain.
  • Assuming all FETs are normally OFF; depletion-mode devices can be normally ON.

Comparison Tables

DeviceControl MethodNormallyKey Exam Point
JFETReverse gate bias controls channel widthON at zero gate biasPinch-off and Shockley equation
Depletion MOSFETGate voltage depletes or enhances existing channelON at zero gate biasCan work with positive or negative gate control
Enhancement MOSFETGate voltage induces channelOFF at zero gate biasThreshold voltage and regions
AmplifierPhaseInput ResistanceMain Use
Common sourceInvertedHighVoltage gain
Common drainSame phaseVery highBuffering
Common gateSame phaseLowHigh-frequency matching

Interview Questions

  • Why is a FET called a voltage-controlled device?
  • Why is MOSFET input resistance very high?
  • What is threshold voltage in an enhancement MOSFET?
  • What is pinch-off in a JFET?
  • What is transconductance, and why does it matter in amplifiers?
  • Why does common-source amplifier invert phase?
  • How is a MOSFET used as a switch?
  • What is the difference between triode and saturation regions?

Exam-Oriented Notes

  • For enhancement MOSFET, first check whether gate-source voltage is above threshold.
  • Use triode condition $$ V_{DS}<V_{GS}-V_T $$ before applying triode-region equations.
  • Use saturation condition $$ V_{DS}\ge V_{GS}-V_T $$ before applying saturation equation.
  • JFET is normally ON; enhancement MOSFET is normally OFF.
  • Common-source amplifier gives voltage gain with phase inversion.
  • Common-drain circuit is a source follower used for buffering.
  • High input resistance is a major advantage of FETs in sensor and amplifier input stages.

Revision Summary

  • FET current is controlled by gate electric field.
  • Gate current is ideally very small, giving high input resistance.
  • JFET channel exists initially and is squeezed by reverse gate bias.
  • Enhancement MOSFET channel forms only after threshold voltage.
  • Transconductance tells how strongly gate voltage controls drain current.
  • Common-source gives voltage gain and phase inversion.
  • Key formulas: $$ I_D=I_{DSS}(1-V_{GS}/V_P)^2 $$, $$ I_D=\frac{1}{2}k(V_{GS}-V_T)^2 $$, and $$ A_v\approx -g_mR_D $$.

Practice Questions

Conceptual

  • Explain FET operation using channel-width control.
  • Why is an enhancement MOSFET normally OFF?
  • Why is common-drain amplifier called a source follower?

Numerical

  • For a MOSFET with $$ V_T=1.5\,V $$ and $$ V_{GS}=4\,V $$, find overdrive voltage.
  • If $$ k=1\,mA/V^2 $$ and $$ V_{OV}=3\,V $$, find saturation drain current.
  • Find common-source gain when $$ g_m=2.5\,mS $$ and $$ R_D=8\,k\Omega $$.

MCQs

  • Which device is normally OFF: JFET, depletion MOSFET, or enhancement MOSFET?
  • Which FET amplifier gives phase inversion: common source, common drain, or common gate?
  • What does transconductance relate: voltage to current, current to current, or voltage to voltage?
5.1

Main Topic

JFET

A JFET is a voltage-controlled channel device. The gate does not need normal forward current; instead, reverse gate bias changes the channel width and controls drain current.

5.1.1

JFET

Construction

A JFET has a conducting channel between source and drain, with gate regions forming reverse-biased PN junctions around that channel. In an n-channel JFET, electrons move from source to drain, and the gate voltage controls how much of the channel remains open.

Step-by-step working

  1. 1Source supplies carriers into the channel.
  2. 2Drain collects carriers after they travel through the channel.
  3. 3Gate PN junction is normally reverse biased.
  4. 4Reverse bias creates depletion regions that enter the channel.
  5. 5The available channel width decides drain current.

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Construction visualization

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Remember

JFET gate controls current by changing channel width through depletion regions.

5.1.2

JFET

Working

When drain-source voltage is applied, carriers flow through the channel. Making gate-source voltage more negative in an n-channel JFET widens the depletion region, narrows the channel, and reduces drain current.

Step-by-step working

  1. 1Apply VDS so carriers move from source to drain.
  2. 2Keep gate reverse biased so gate current is almost zero.
  3. 3Increase reverse gate bias to widen depletion regions.
  4. 4The channel becomes narrower and current reduces.
  5. 5At pinch-off or cutoff condition, current is strongly limited.

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Working visualization

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Remember

More reverse gate bias in an n-channel JFET means less drain current.

5.1.3

JFET

Characteristics

JFET output characteristics show drain current versus drain-source voltage for different gate-source voltages. Transfer characteristics show how drain current changes with gate-source voltage.

Step-by-step working

  1. 1At small VDS, the JFET behaves like a voltage-controlled resistor.
  2. 2As VDS increases, the channel pinches near the drain side.
  3. 3After pinch-off, drain current becomes almost constant.
  4. 4Changing VGS shifts the current level.
  5. 5Transfer curve links ID to VGS and is central to bias analysis.

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Characteristics visualization

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Remember

JFET current is controlled by VGS; output curves reveal ohmic and saturation regions.

5.2

Main Topic

MOSFET

A MOSFET uses an insulated gate. Since the gate is separated by oxide, gate current is ideally almost zero, and the electric field from gate voltage creates or modifies the channel.

5.2.1

MOSFET

Enhancement MOSFET

An enhancement MOSFET is normally OFF at zero gate-source voltage. A sufficient gate voltage creates an inversion channel, allowing drain current to flow.

Step-by-step working

  1. 1With VGS below threshold, no strong channel exists.
  2. 2Increasing VGS attracts carriers near the oxide-semiconductor surface.
  3. 3At threshold voltage, a usable conducting channel forms.
  4. 4Applying VDS moves carriers from source to drain.
  5. 5Further VGS increase strengthens the channel and increases drain current.

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Enhancement MOSFET visualization

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Remember

Enhancement MOSFET needs VGS above threshold to turn ON.

5.2.2

MOSFET

Depletion MOSFET

A depletion MOSFET already has a channel at zero gate-source voltage. Gate voltage can deplete the channel and reduce current, or enhance it and increase current depending on polarity.

Step-by-step working

  1. 1At VGS = 0, the existing channel conducts.
  2. 2A depletion-polarity gate voltage pushes carriers out of the channel.
  3. 3Channel conductivity decreases and drain current falls.
  4. 4An enhancement-polarity gate voltage attracts more carriers.
  5. 5Channel conductivity increases and drain current rises.

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Depletion MOSFET visualization

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Remember

Depletion MOSFET can conduct at VGS = 0; enhancement MOSFET normally cannot.

5.3

Main Topic

FET Biasing

FET biasing fixes the DC operating point using voltage control rather than base current control. The goal is stable drain current and enough signal swing.

5.3.1

FET Biasing

Gate bias

Gate bias applies a fixed gate voltage to set the operating point. Because gate current is almost zero, the gate voltage can be established with high-value resistors, but device parameter variation may still move the drain current.

Step-by-step working

  1. 1Choose the desired drain current or operating region.
  2. 2Apply a gate voltage through a high-resistance path.
  3. 3Use the FET transfer relation to estimate drain current.
  4. 4Set drain resistor or load to place drain voltage in the useful range.
  5. 5Check that signal swing does not push the device into cutoff or triode unintentionally.

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Gate bias visualization

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Remember

Gate current is almost zero, but FET drain current still depends strongly on device parameters.

5.3.2

FET Biasing

Self bias

Self bias uses a source resistor so the source voltage rises with drain current. This automatically makes gate-source voltage oppose current increase, giving negative feedback.

Step-by-step working

  1. 1Gate is commonly referenced to ground through a large resistor.
  2. 2Drain current flows through the source resistor.
  3. 3Source voltage rises as current increases.
  4. 4For n-channel devices, VGS becomes less positive or more negative.
  5. 5That change reduces current and stabilizes the operating point.

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Self bias visualization

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Remember

Source resistor feedback is the stabilizing heart of self bias.

5.3.3

FET Biasing

Voltage divider bias

Voltage divider bias sets gate voltage using two resistors, while a source resistor adds feedback. It is widely used because it makes the Q-point less dependent on gate leakage and device spread.

Step-by-step working

  1. 1Divider resistors establish gate voltage.
  2. 2Source resistor establishes source voltage from drain current.
  3. 3The difference VG - VS sets gate-source voltage.
  4. 4Drain current follows the FET transfer relation.
  5. 5Source feedback corrects current drift and improves stability.

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Voltage divider bias visualization

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Remember

For FET divider bias, solve VG first, then VS, then VGS.

5.4

Main Topic

FET Amplifiers

A FET amplifier converts gate-voltage variation into drain-current variation. The load then converts that current variation into an output voltage.

5.4.1

FET Amplifiers

Common source

The common-source amplifier is the FET counterpart of the BJT common-emitter amplifier. It provides voltage gain with phase inversion and high input resistance.

Step-by-step working

  1. 1Bias the FET in the saturation region.
  2. 2Apply the AC input at the gate.
  3. 3Gate-source voltage variation changes drain current.
  4. 4Drain resistor converts current variation into voltage variation.
  5. 5Output at the drain is amplified and inverted.

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Common source visualization

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Remember

Common source gives voltage gain and 180 degree phase inversion.

5.4.2

FET Amplifiers

Common gate

The common-gate amplifier has gate as AC reference, input at source, and output at drain. It has low input resistance and no phase inversion.

Step-by-step working

  1. 1Hold gate at AC ground.
  2. 2Apply input at the source terminal.
  3. 3Source voltage changes VGS and therefore drain current.
  4. 4Drain load converts current variation into output voltage.
  5. 5Output is not phase inverted in the same way as common source.

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Common gate visualization

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Remember

Common gate is useful for low input resistance and high-frequency applications.

5.4.3

FET Amplifiers

Common drain

The common-drain amplifier is also called a source follower. It has voltage gain close to one, high input resistance, and low output resistance, making it useful as a buffer.

Step-by-step working

  1. 1Apply input at the gate.
  2. 2Take output from the source.
  3. 3Source voltage follows gate voltage through the FET action.
  4. 4Voltage gain remains slightly less than one.
  5. 5The stage isolates a weak signal source from a heavier load.

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Common drain visualization

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Remember

Common drain is a source follower used for buffering.